User Guide
Comprehensive guides for using HPCSeries Core effectively.
- Architecture
- HPCSeries Core v0.7 — Logical Architecture
- Architectural Intent
- High-Level Layer Stack
- Fortran Kernel Subsystems
- Parallel & Vectorized Execution
- C++ Fast-Path Kernels
- Stable C ABI Layer
- Python Binding Layer (v0.7)
- What HPCSeries Core IS (and Is Not)
- Architectural Stability
- Design Decisions
- Zero-Copy Design
- Thread Safety
- See Also
- Performance Guide
- Migration Guide
Architecture Overview
HPCSeries Core is a hybrid Fortran/C/C++ library with Python bindings:
Performance Stack:
┌─────────────────────────────────────┐
│ Python API (Zero-Copy) │ ← User Interface
├─────────────────────────────────────┤
│ Cython Bindings │ ← NumPy Integration
├─────────────────────────────────────┤
│ C/C++ Orchestration Layer │ ← SIMD Dispatch
├─────────────────────────────────────┤
│ Fortran HPC Kernels + C SIMD │ ← Core Algorithms
├─────────────────────────────────────┤
│ SIMD Instructions (AVX2/AVX-512) │ ← Hardware Acceleration
├─────────────────────────────────────┤
│ OpenMP Parallelization │ ← Multi-threading
└─────────────────────────────────────┘
Key Design Principles
Zero-Copy: Direct NumPy array access without data copying
SIMD Vectorization: Automatic use of AVX2/AVX-512 when available
OpenMP Parallelization: Multi-threaded for large datasets
Adaptive Tuning: Auto-calibration for optimal performance
Robust Statistics: MAD-based methods resistant to outliers
Contents
Architecture - Detailed architecture and design decisions
Performance Guide - Performance tuning and benchmarking
Migration Guide - Migrating from NumPy/Pandas